Regviz

NXP Semiconductors /MIMXRT1021 /DMA0 /TCD31_DLASTSGA

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TCD31_DLASTSGA

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/MIMXRT1021/DMA0/TCD31_DLASTSGA#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DLASTSGA

Description

TCD Last Destination Address Adjustment/Scatter Gather Address

Fields

DLASTSGA

Destination last address adjustment, or next memory address TCD for channel (scatter/gather)

Links

()

Register License

Copyright 2016-2020 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data